AMD AMD5K86 - TABLE 3-5. Instructions that Modify the if or VIF Flags

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1 8524BjO-Marl 996
AMD5J!J6 Processor Technical Reference Manual
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lD Flag
Virtual Interrupt Pending
Virtual Interrupt Flag
Alignment Check
Virtual-8086 Mode
Resume Flag
Nested Task
I/O Privilege Level
Overflow Flag
Direction Flag
Interrupt Flag
Trap Flag
Sign Flag
Zero Flag
Auxiliary Flag
Parity Flag
Carry Flag
ID
VIP
VIF
AC
VM
RF
NT
10PL
OF
DF
IF
TF
SF
ZF
AF
PF
CF
18
17
16
14
A V
C M
I
o
P
L
13-12 ---------'
11
10
9
8
7
6
4
2
o
o D ITS
F F F F F
FIGURE 3-6. EFLAGS Register
TABLE 3-4. Virtual-Interrupt Additions to EFLAGS Register
Bit Mnemonic
Description Function
Set by the operating system (via the EFLAGS
image on the stack)
when an external mask able
20 VIP
Virtual Interrupt
interrupt (INTR) occurs for a
Virtual-8086 pro-
Pending gram who's VIF
bit is cleared. The bit is checked
by the processor when the program subsequently
-
attempts to set VIF.
When
the VME bit in CR4 is set, the VIF bit is
modified by the processor
when a Virtual-8086
Virtual
Interrupt
program running at
less privilege than the IOPL
19 VIF
attempts to modify the IF bit.
The VIF bit is used
Flag
by the operating system to determine whether a
maskable interrupt should
be passed on to the
program or held pending.
Control Register 4 (CR4) Extensions
3-15