AMD AMD5K86 - Array Access Register (AAR)

AMD~
AMD5~6 Processor Technical Reference Manual
18524B/O-Mar1996
7.4.1
31
31
• 4-Kbyte TLB-128-entry, 4-way, set associative
• Linear-tag array
• Page array
• 4-Mbyte TLB-4-entry, fully associative
• Linear-tag array
• Page array
Array Access Register (AAR)
The 64-bit Array Access Register (AAR) is a model-specific
register (MSR) that contains a 32-bit array pointer, which iden-
tifies the array location to be tested, and 32 bits of array test
data
to be read or written. The WRMSR and RDMSR instruc-
tions access the AAR when the ECX register contains the value
82h, as described in Section 3.3.5 on page 3-35. Figure 7-2
shows the format of the AAR.
0
Array Pointer
I
(Contents of EDX)
MSR
0
82h
Array Data
I
(Contents of EAX)
FIGURE 7-2. Array Access Register (AAR)
7-8
To read or write an array location, perform the following steps:
1. ECX-Enter 82h into ECX to access the 64-bit AAR.
2. EDX-Enter a 32-bit array pointer into EDX, as shown in
Figures 7-3 through 7-8 (top).
3.
EAX-Read or write 32 bits of array test data to or from
EAX, as shown in Figures 7-3 through 7-8 (bottom).
Test and Debug