AMD AMD5K86 - Hardware Debug Tool (HDT)

AMD~
AMD5t1J6 Processor Technical Reference Manual
18524B/O-Mar1996
7.8.2 Public Instructions
The processor supports all three IEEE-mandatory instructions
(BYPASS, SAMPLEIPRELOAD, EXTEST), three IEEE-
optional instructions (IDeODE, IllGHZ, RUNBIST), and three
instructions unique to the AMD5
K
86 processor (ALL!, ALLO,
USEHDT). Table 7-6 shows the complete set of public TAP
instructions supported by the processor. In addition, the pro-
cessor implements several private manufacturing test instruc-
tions.
The IEEE standard describes the mandatory and optional
instructions. The ALL! and ALLO instructions simply force all
outputs and bidirectionals High or Low. The USEHDT instruc-
tion is described below. Any instruction encodings not shown
in Table 7-6 select the BYPASS instruction.
TABLE 7-6. Public TAP Instructions
Instruction
Encoding Register
Description
EXTEST 00000
BSR
As defined by the IEEE standard
SAMPLEI
00001 BSR
As defined by the IEEE standard
PRELOAD
meODE 00010
DIR
As defined by the IEEE standard
lllGHZ 00011 BR
As defined by the IEEE standard
ALL1 00100
BR
Forces all outputs and bidirectionals High
ALLO 00101 BR
Forces all outputs and bidirectionals Low
USEHDT 00110 HDTR
Accesses the Hardware Debug Tool (HDT)l
See Section 7.9 on page 7-23
RUNBIST 00111
BISTRR
As defined by the IEEE standard
BYPASS 11111 BR
As defined by the IEEE standard
BYPASS undefined BR
Undefined instruction encodings select the
BYPASS instruction
Notes:
1. Documentation on the Hardware Debug Tool (HDT) is available from AMD under a nondisdosure agreement.
7-22
Test and Debug