AMD AMD5K86 - D;C (Data or Code)

AMD~
AMD5t!16 Processor Technical Reference Manual
18524B/O-Mar1996
5.2.17
Summary
D/C (Data or Code)
Output
The processor drives DIC to indicate whether it is accessing
data or executable code on the bus. The signal is driven at the
same time as the other two cycle definition signals: MIIO and
WIR. A specific encoding of DIC, MIIO, and WIR identifies one
of several special bus cycles.
Driven and Floated
The processor drives DIC from ADS until the last expected
BRDY of the bus cycle.
Details
5-54
DIC is driven with the other cycle definition outputs (MIIO and
WIR) and with the BE7-BEU byte-enable outputs during mem-
ory cycles (including cache writethroughs and writebacks), liD
cycles, locked cycles, special bus cycles, and interrupt
acknowledge operations in the normal operating modes (Real,
Protected, and Virtual-8086) and in SMM, or while PRDY is
asserted. While AHOLD is asserted, DIC is driven only to com-
plete a bus cycle that had been initiated before AHOLD was
asserted, or for inquire cycle writebacks. During the Shut-
down, Halt, and Stop Grant states, DIC is driven only for
inquire cycle writebacks. DIC is not driven during the Stop
Clock state, or while BUFF, HLDA, RESET, or INIT is asserted.
The processor floats DIC one clock after system logic asserts
BUFF and in the same clock that the processor asserts HLDA.
The processor drives DIC according to whether the access is
initiated by the processor's prefetch or branch logic (indicating
a code access) or its load/store logic (indicating a data access).
In the AMD5
K
86 processor, code accesses can be done specula-
tively, but data accesses are not. Only data (not code) can be
read from the liD address space, because the cycle definition
for an liD code read (DIC = 0, MIIO = 0, WIR = 0) defines an
interrupt acknowledge cycle.
Before the processor fetches an instruction or reads or writes a
data operand, it checks the descriptor for the segment contain-
ing the code or data to verify that such action is allowed. The
execute (E) bit in the segment descriptor distinguishes
between data and code segments. A general-protection excep-
tion is generated if the E bit does not match the DIC type.
Bus Interface