AMD AMD5K86 - INIT (Initialization)

AMD~
AMD5~6 Processor Technical Reference Manual
18524B/O-Mar1996
5.2.31
Summary
Sampled
Details
5-82
INIT (Initialization)
Input
The assertion of INIT causes the processor to reinitialize its
system registers and certain other resources, but it preserves
the contents of the caches, the floating-point state, and certain
other resources. If INIT is asserted at RESET, it invokes the
processor's built-in self test (BIST).
The processor samples INIT every clock and recognizes it at
the next instruction boundary. INIT is a rising-edge-triggered
interrupt and is latched when sampled. However, in order to
be recognized reliably, the signal must be negated for two
clocks prior to assertion.
INIT is sampled during memory cycles (including cache
writethroughs and writebacks), cache accesses, I/O cycles,
locked cycles, special bus cycles, and interrupt acknowledge
operations in the normal operating modes (Real, Protected,
and Virtual-8086); or in the Shutdown, Halt, or Stop Grant
states; or while AHOLD, BOFF, HLDA, or RESET is asserted.
INIT is not sampled in the Stop Clock state or while PRDY is
asserted.
If INIT is asserted on the falling edge of RESET, the processor
performs its built-in self test (BIST) before initialization and
code fetching begin. System logic can drive the signal either
synchronously or asynchronously (see the data sheet for syn-
chronously driven setup and hold times).
If INIT is asserted at the same time as RESET, RESET is recog-
nized but INIT is not. If INIT and NMI are both asserted during
the Stop Grant state (not necessarily simultaneously), the
AMD5
K
86 processor recognizes the INIT after leaving the Stop
Grant state, then it recognizes the NMI prior to fetching any
instructions. The Pentium processor does not recognize the
NMI.
INIT is the fifth-highest-priority external interrupt. For details
on its relationship to other interrupts and exceptions, see Sec-
tion 5.1.3 on page 5-14 and Table 5-3 on page 5-17.
INIT is typically asserted after power-up in response to a BIOS
interrupt that writes to an 110 port. This is often, for example,
in response to the operator's pressing Ctrl-Alt-Del. The BIOS
Bus Interface