AMD AMD5K86 - Boundary-Scan Test Access Port (TAP)

18524BjO-Mar1996
AMD~
AMD5~6 Processor Technical Reference Manual
Errors detected by the checker are reported on the !ERR out-
put of the checker. If a mismatch occurs on such a comparison,
the checker asserts !ERR for one clock, two clocks after the
detection of the error. Both the master and the checker con-
tinue running the checking program after an error occurs. No
action other than the assertion of !ERR is taken by the proces-
sor. On
the AMD5
K
86 processor, the !ERR output is reserved
solely for functional-redundancy checking. No other errors are
reported on that output.
Functional-redundancy checking is typically implemented on
single-processor, fault-monitoring systems (which actually
have two processors). The master processor runs the opera-
tional programs and the checker processor is dedicated
entirely to constant checking. In this arrangement, the test of
accurate operation consists solely of reporting one or more
errors. The particular type of error or the instruction causing
an error is not reported. The arrangement works because the
processor is entirely deterministic. Speculative prefetching,
speculative execution, and cache replacement all occur in
identical ways and at identical times on both processors if their
signals are tied together so that they run the same program.
The Functional-Redundancy Checking mode can only be
exited by the assertion of RESET. Functional-redundancy
checking cannot be performed in the Hardware Debug Tool
(HDT) mode.
The assertion of FRCMC is not recognized while
PRDY is asserted.
7.8 Boundary-Scan Test Access Port (TAP)
The boundary-scan Test Access Port (TAP)-originally pro-
posed by the Joint European Test Action Group (JETAG) and,
later, Joint Test Action Group (JTAG)-is an IEEE standard
that defines synchronous scanning test methods for complex
logic circuits, such as boards containing a microprocessor. The
AMD5
K
86 processor supports the full TAP standard defined in
the IEEE Standard Test Access Port and Boundary-Scan Architec-
ture (IEEE 1149.1-1990) specification.
Boundary-Scan Test Access Port (TAP)
7-19