AMD AMD5K86 - Page 85

AMD~
AMD5J<!36 Processor Technical Reference Manual
18524B/O-Mar1996
• EDX:
•
EDX[O]
EDX[l]
•
EDX[2]
•
EDX[3]
•
EDX[4]
EDX[5]
•
EDX[6]
•
EDX[7]
EDX[8]
EDX[9]
EDX[31-10]
FPU on chip (1 = FPU, 0 = no FPU)
Virtual Mode Extensions (1 = support, 0 = no support)
I/O Breakpoints (1 = support, 0 = no support)
4-Mbyte
Pages (1 = support, 0 = no support)
Time Stamp Counter (1
= support, 0 = no support)
K86™ Model-Specific Registers (1
= support, 0 = no support)
Reserved
Support of machine-check exception (1 = supported)
Execution of CMPXCHG8B instruction (1 = supported)
Global
Paging Extension (1 = supported)
reserved
The following pseudo-code illustrates the use of the CPUID instruction:
begin
{
if vendor string report desired
{
load EAX with Oh
execute cpuro instruction (opcode = OFh OA2h)
Result:
EBX 'Auth'
EOX 'enti'
ECX 'cAMO'
}
else if CPU information desired
{
3-30
load EAX with 1
execute CPUIO instruction (opcode = OFh OA2h)
Result:
EAX[3-0] = stepping IO (contact AMO for specifics)
EAX[7-4] = Model
AMO-SSA5 processor -> OOOOb
AM05
K
86 processor -> 0001b
EAX[II-8] = Family
K5 CPU -> 5
EAX[31-12] = Reserved
EBX = OOOOOOOOh
ECX = OOOOOOOOh
EOX[O] Ib (bit 0==1
EOX[I] Ib (bit 1==1
EOX[2] Ib (bit 2==1
indicates
indicates
indicates
EOX[3] Ib (bit 3==1 indicates
EOX[4] Ib (bit 4==1 indicates
FPU present)
Virtual Mode Extensions)
I/O Breakpoints)
4-Mbyte pages)
Time Stamp Counter)
Software Environment and Extensions