AMD AMD5K86 - Page 91

AMD~
AMD51J6 Processor Technical Reference Manual
1 8524BjO-Mar1996
The above value in ECX identifies the register to be read or written. The EDX and
EAX registers contain the MSR values to be read or written, as follows:
• EDX-Upper 32 bits of MSR. For the AAR, this contains the array pointer and (in
contrast to all other MSRs) its contents are not altered by a RDMSR instruction.
• EAX-Lower 32 bits of MSR. For the AAR, this contains the data to be read/writ-
ten.
All MSRs are 64 bits wide. However, the upper 32 bits of the AAR are write-only and
are not returned on a read. EDX remains unaltered, making it more convenient to
maintain the array pointer.
If an attempt is made to execute either the RDMSR or WRMSR instruction when
CPL is greater than 0, or to access an undefined model-specific register, the proces-
sor generates a general-protection exception with error code zero.
Model-specific
registers, as their name implies, mayor may not be implemented by
later models of the AMD5
K
86 processor.
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Software Environment and Extensions