Xilinx Virtex-6 FPGA User Manual

Virtex-6 FPGA GTX Transceivers User Guide www.xilinx.com 189
UG366 (v2.5) January 17, 2011
RX Analog Front End
Table 4-6 outlines the recommended settings for RX termination in Use Mode 3. Figure 4-5
shows the Use Mode 3 configuration.
Table 4-6: RX Termination Use Mode 3 Configuration and Notes
Use Mode
External
AC
Coupling
Term
Voltage
Internal AC
Coupling
Internal
Bias
Max
Swing
mV
DPP
Suggested Protocols and Usage Notes
3 ON Float OFF 800 mV 1600 Protocol: Optical IF (SONET/SDH/OTU),
SFP+, HD/SD-SDI, XAUI (1600 mVdpp), GbE,
DisplayPort (1.2V option)
Attribute Settings:
AC_CAP_DIS = TRUE
RCV_TERM_GND = FALSE
RCV_TERM_VTTRX = FALSE
Notes:
Similar to Case 2, but for interfaces with
> 1200 mV swing. This option has a lower
bandwidth than Case 2.
X-Ref Target - Figure 4-5
Figure 4-5: RX Termination Use Mode 3 Configuration
UG366_c4_05_071009
~100 nF
nominal
50Ω
nominal
50Ω
FPGABoard
MGTAVTT_*
MGTAVTT_*
~100 nF
nominal 7 pFESD Diodes
ESD Diodes
nominal 7 pF
nominal
50 KΩ
nominal
50 KΩ
V
CM
2/3 MGTAVTT_*
www.BDTIC.com/XILINX

Xilinx Virtex-6 FPGA Specifications

General

Brand	Xilinx
Model	Virtex-6 FPGA
Category	Transceiver
Language	English