Xilinx Virtex-6 FPGA

30 www.xilinx.com Virtex-6 FPGA GTX Transceivers User Guide
UG366 (v2.5) January 17, 2011
Chapter 1: Transceiver and Tool Overview
Attributes:
• SAS_MAX_COMSAS
• SAS_MIN_COMSAS
• SATA_BURST_VAL
• SATA_IDLE_VAL
• SATA_MAX_BURST
• SATA_MAX_INIT
• SATA_MAX_WAKE
• SATA_MIN_BURST
• SATA_MIN_INIT
• SATA_MIN_WAKE
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RX Equalizer
Ports:
• DFECLKDLYADJ[5:0]
• DFECLKDLYADJMON[5:0]
• DFEDLYOVRD
• DFEEYEDACMON[4:0]
• DFESENSCAL[2:0]
• DFETAP1[4:0]
• DFETAP1MONITOR[4:0]
• DFETAP2[4:0]
• DFETAP2MONITOR[4:0]
• DFETAP3[3:0]
• DFETAP3MONITOR[3:0]
• DFETAP4[3:0]
• DFETAP4MONITOR[3:0]
• DFETAPOVRD
• RXEQMIX[9:0]
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Attributes:
• DFE_CAL_TIME[4:0]
• DFE_CFG[7:0]
• RX_EN_IDLE_HOLD_DFE
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RX CDR
Ports:
• RXCDRRESET
• RXRATE[1:0]
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Table 1-1: Port and Attribute Summary (Cont’d)
Port/Attribute Section, Page
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