AMD AMD5K86 - Page 404

18524B/O-Mar1996
Index
Numerics
4-Mbyte Pages 3-5,3-8
A
A20M 5-9,5-19,6-22
A31-A3 5-9,5-21,5-138
Accessed bit 5-172
Address Parity 5-9
Addresses 5-9,5-138
A20M mask 5-19
address generation during bursts 5-22,5-151
aliasing 2-16,2-23
aligned 5-115
alignment 5-139
boot 5-111
bus 5-21
hold 5-29, 5-158
indexed 4-3
parity 5-32,5-33,5-158
pipelining 5-97
selector:offset format 5-114
strobe 5-25, 5-28, 5-59
Address-Generation Interlocks (AGIs) 4-4
ADS 5-9, 5-25, 5-137
ADS"C 5-9, 5-28
AGIs 4-4
AHOLD 5-9,5-29,5-158,5-160,5-161,6-17
Aliasing 2-16,2-23
Alignment 5-139
ALU
instruction classes 2-9
AP 5-9,5-32
APCHK 5-9, 5-33, 5-158
Array Access Register (AAR) 7-8
Array Pointer 7-8,7-9
Array Test Data 7-8,7-10
B
Backoff 5-38, 5-163
BE7-BEU 5-34,5-57,5-138
BF 5-11, 5-37
BIST 7-5
Bit Scan 4-4
Bit
Test 4-4
Bits
A 5-172
accessed 5-172
D 5-172
DBP 7-4
DC
7-4
DDC 7-4
DE 3-3
Index
AMD~
AMD5~6 Processor Technical Reference Manual
DIC 7-4
dirty 5-172
DSPC 7-4
G 3-8,3-11
GPE 3-3
MCE 3-3,3-4
PS 3-8,3-11
PSE 3-3
PVI 3-3, 3-24
TSC 3-27
TSD 3-3, 3-27
VIF 3-13,3-15
VIP 3-13, 3-15
VME 3-3,3-12
BUFF 5-9,5-38,5-163,5-165,5-174,6-15
Boot Address 5-83,5-111,5-196
Boundary-Scan 5-128,5-129,5-130, 5-131, 5-132
Boundary-Scan
Test Access Port (TAP) 7-19
Branch Unit 2-10
Branches 2-3, 2-6
prediction 2-6, 4-2
tracing 5-36,5-181,7-17
Branch-Trace
Message Cycle 5-188
BRDY 5-10,5-42,5-138,5-151
BRIJYC 5-10
BREQ 5-9, 5-46
Buffers 2-23
external write 5-63
invalidation 2-25
line-fill 2-23
prefetch 2-3, 2-22, 2-24
replacement 2-25
store 2-8,2-11,2-12,2-22, 2-24
writeback 2-8,2-12,2-22,2-25,2-26
Built-In Self Test (BIST) 7-5
Bursts 5-150
addresses 5-22,5-151
CACHE 5-50
Bus
address hold 5-158
arbitration 5-9,5-29,5-38,5-46,5-78,6-14
backoff 5-38,5-163
check 5-47
clock 5-53
deadlock 5-38
frequency 5-37
hold 5-38,5-78,5-167
interface 5-1
lock 5-92
speed 5-140, 6-9
turnaround 5-38,5-78
/-1