AMD AMD5K86 - Page 405

AMD~
AMD5J136 Processor Technical Reference Manual
Bus Cycles 5-137
aligned 5-115
alignment 5-139
branch tracing 5-36,5-181
burst addresses 5-22, 5-151
bursts 5-150
encoding 5-36, 5-181
FLUSH acknowledge 5-36, 5-181
I/O 5-9
inquire cycles 5-157,6-12,6-14
interrupt acknowledge 5-86,5-176
interrupt-acknowledge 5-9,5-176
INVD
invalidation 5-36,5-181
locked 5-9, 5-92
locked cycles 5-170
memory reads 5-9
memory writes 5-9
misaligned 5-115
prioity 5-140
read-cycle timing 6-1
special 5-9,5-181
split 5-115
timing 5-141
WBINVD
invalidation 5-36,5-181
writebacks 5-150,5-154
BOSCHK 5-11,5-17,5-47
Byte
Enables 5-34
Byte Operations 4-3
Byte Queue 2-7
C
CACHE 5-10,5-50,5-137
Cache
blocking 2-13
cache able memory 6-4, 6-5
cache-invalidation cycle 5-185
cache-tag recovery 2-17
cache-writeback and invalidation cycle 5-186
coherency 2-18,5-73,5-106,5-135,5-136,6-10
control 5-10, 6-9
data 2-15
design 6-8
disable 5-100
dual-tagged 2-16
enable (KEN) 5-90
enabling 2-13
FLUSH 5-67
hits 5-9
inquire cycles 2-21
instruction 2-14
internal snooping 2-22
invalidation 2-20, 5-89, 6-22
invalidation cycles 5-36,5-181
invalidations 2-16,2-17
L2 6-9,6-19
line fills 2-17,5-150
/-2
18524BjO-Mar1996
line-fill buffers 2-23
locking 2-13
MESI
state 2-16,2-18,5-73,5-106,5-135,5-136,
6-10
organization and management 2-13
replacement 2-20
SMM memory 6-5
snooping 2-20, 2-21
speed 6-9
tags 2-16
task switches 2-16
testing 7-7
writebacks 5-150,5-154
write-once protocol 6-19
CLK 5-11,5-37,5-53,5-193
Clock xvi
test 5-128
Clock Signals 5-11
Clocks 5-37
CLK 5-53
control 6-33
dead or idle 5-138,5-170
delay function 6-41
design 6-40
disable stopping 7-4
state transitions 6-34
stopping 5-123
synthesizer 6-42
CMPXCHG8B 3-32,5-139
Code
D/C 5-54
optimization 4-1
Compatibility
bus signals A-2
Pentium processor A-1
CPL 5-141
CPUID 3-29
CR4 3-2, 3-33
Current privilege level 5-141
Cycle xvi
Cycle
Definition and Control Signals 5-9
D
D/C 5-9, 5-54, 5-137
D63-DO 5-10, 5-56
Data
bus 5-56
cache 2-15
D/C 5-54
embedded in code 4-2
parity 5-10
signals 5-10
transfers 5-42
wait states 5-42
DBP
7-4
DC 7-4
Index