GE Multilin F650 - Logic Compilation

CHAPTER 5: SETPOINTS 5.10 LOGIC CONFIGURATION (PLC EDITOR)
GEK-106310-AF F650 DIGITAL BAY CONTROLLER 5-179
5.10.1.2 Logic compilation
The F650 configuration is made using the basic operations related before and more complex operations can be developed
inside libraries.
All the graphical configuration performed in the Logic configuration editor must be read and interpreted by the PLC as the
F650 engine. The graphical equations must be translated into compiled equations to be understood by the relay. For this
purpose the logic configuration editor provides a compilation option to compile the whole configuration, creating a series
of equations that forms the logical configuration of the element.
The next diagram shows the way compiled logic equations are built.
Figure 5-55: Compiled logic equations
DIVISION Result of division of both inputs is stored
into variable assigned to Division output.
If Input 2=0 Then result of division is stored
a
s 0.
ADDITTION Result of multiplication of both inputs is
st
ored into variable assigned to addition
output
SUBTRACTION When this operand is used, Subtraction
b
etween two inputs is performed and result
is stored into variable assigned to
subtraction output.
EQUATIONS
PLC
PLC
DAT OPERATION
COMPILATION