7-84 F650 DIGITAL BAY CONTROLLER GEK-106310-AF
7.2 IEC 61850 PROFILE FOR F650 CHAPTER 7: IEC 61850 PROTOCOL
2.2.8. PTTR (Thermal overload)
This logical node shall be used to model the thermal overload functions and has three instances inside the device. This
node has been implemented in firmware version 7.20 or above.
2.2.9 PDOP (Directional Overpower)
All logical node classes described in this section have been included from firmware version 7.50.
2.2.9.1 FwdPDOP
This logical node class shall be used to model the forward overpower function and has three instances inside the device.
PTTR class
Attribute Name Attribute type Explanation M/O/C/E Notes
PTTR Thermal overload
Data
Common Logical Node Information
Mod ENC Mode M Status-only
Beh ENS Behaviour M
Health ENS Health M
NamPlt LPL Name Plate M
Status information
Str ACD Start M Thermal PKP
Op ACT Operate M Thermal OP
Blk SPS Block O Thermal BLK
AlmThm SPS Thermal alarm O
AlmThmPhA SPS Thermal alarm phase A E
AlmThmPhB SPS Thermal alarm phase B E
AlmThmPhC SPS Thermal alarm phase C E
Settings
PTTREna SPG Thermal overload enable E
ConsTmmHeat ASG Heat time constant E
ConsTmmCool ASG Cool time constant E
StrVal ASG Pickup level O
AlmVal ASG Alarm level O
SnpshtEvEna SPG Snapshot events enabled E
PDOP class
Attribute
Name
Attr.
Type
Explanation M/O notes
PDOP Overpower
Data
Common Logical Node Information
Mod geModENC Mode M
Beh geBehENS Behaviour M
Health geHealthENS Health M
NamPlt geLPL Name plate M
Status Information
Str gePhsACD Start M Stage 1 PKP
Op gePhsACT Operate M Stage 1 OP
Blk geSPS_1 Block O
S2Str gePhsACD_2 Start O Stage 2 PKP
S2Op gePhsACT_1 Operate O Stage 2 OP
Settings
PDOPEna geSPG_2 Function O
BlkCloseTmms geING_0_2 Blk time after close O
StrVal geFloatASG_2 Stage 1 Tap O
OpDlTmms geING_8_2 Stage 1 Time O
S2StrVal geFloatASG_2 Stage 2 Tap O
S2OpDlTmms geING_8_2 Stage 2 Time O
SnpshtEvEna geSPG_2 Snapshot events enabled O