CHAPTER 7: IEC 61850 PROTOCOL 7.2 IEC 61850 PROFILE FOR F650
GEK-106310-AF F650 DIGITAL BAY CONTROLLER 7-143
2.3.5 RSYN (Synchronism-check)
2.3.5.1 RSYN
This logical node class is used modelling the synchrocheck function and has 1 instance inside the device
RFLOEna geSPG Function
Z1Mod geFloatASG_1 Pos.Seq. Module
Z1Ang geIntASG_1 Pos.Seq. Angle
Z0Mod geFloatASG_1 Zero Seq. Module
Z0Ang geIntASG_1 Zero Seq. Angle
LinLenkm geFloatASG Line length
ShwFltHMI geSPG Show fault in HMI
EventEna geSPG Snapshot Events enabled
PhCtPol geSPG Phase CT Polarity
RSYN class
Attribute
Name
Attr.
Type
Explanation M/O Notes
RSYN Synchronism-check
Data
Common Logical Node Information
Mod geModINC Mode M
Beh geBehINS Behaviour M
Health geHealthINS Health M
NamPlt geLPL Name plate M
Status Information
SynBlkIn geSPS_1 Block signal O
SynOp geSPS_1 Closing permission signal O
Rel geSPS Release M
SynCondOp geSPS_1 Closing perm. according to logic O
DLDBOp geSPS_1 Closing perm. in DLDB condition O
DLLBOp geSPS_1 Closing perm. in DLLB condition O
LLDBOp geSPS_1 Closing perm. in LLDB condition O
HzInd geSPS Frequency difference indicator O
BusHzHiLinHz geSPS_1 Busbar frequency > line frequency O
BusHzLoLinHz geSPS_1 Busbar frequency < line frequency O
Measured values
DifVClc geFloatMV Calculated difference in voltage O
DifHzClc geFloatMV Calculated difference in frequency O
Settings
RSYNEna geSPG Function O
DeaBusVal geFloatASG Dead bus value O
LivBusVal geFloatASG Live bus value O
DeaLinVal geFloatASG Dead line value O
LivLinVal geFloatASG Live line value O
DifV geFloatASG Difference voltage O
DifAng geFloatASG Difference angle O
DifHz geIntASG Difference frequency O
TotTmms geING_8 Total time of synch. process O
DLDBEna geSPG Dead line - dead bus permission O
LLDBEna geSPG Live line - dead bus permission O
DLLBEna geSPG Dead line - live bus permission O
EventEna geSPG Snapshot events enabled O
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