Intel D50DNP Series - Page 206

Intel® Server D50DNP Family Integration and Service Guide
206
Post
progress
code (Hex)
Upper Nibble
Lower Nibble
Description
8h 4h 2h 1h 8h 4h 2h 1h
31
0
0
1
1
0
0
0
1
Memory installed
32
0
0
1
1
0
0
1
0
CPU PEIM (CPU initialization)
33
0
0
1
1
0
0
1
1
CPU PEIM (cache initialization)
34
0
0
1
1
0
1
0
0
CPU BSP selection
35
0
0
1
1
0
1
0
1
CPU AP initialization
36
0
0
1
1
0
1
1
0
CPU SMM initialization
4F
0
1
0
0
1
1
1
1
DXE IPL started
Memory Feature Progress Codes
C1
1
1
0
0
0
0
0
1
Memory POR check
C2
1
1
0
0
0
0
1
0
Internal use
C3
1
1
0
0
0
0
1
1
Internal use
C4
1
1
0
0
0
1
0
0
Internal use
C5
1
1
0
0
0
1
0
1
Memory early initialization
C6
1
1
0
0
0
1
1
0
Display DIMM information in debug mode
C7
1
1
0
0
0
1
1
1
JEDEC NVDIMM training
C9
1
1
0
0
1
0
0
1
Setup SVL and scrambling
CA
1
1
0
0
1
0
1
0
Internal use
CB
1
1
0
0
1
0
1
1
Check RAS support
CC
1
1
0
0
1
1
0
0
PMem ADR initialization
CD
1
1
0
0
1
1
0
1
Internal use
CE
1
1
0
0
1
1
1
0
Memory late initialization
CF
1
1
0
0
1
1
1
1
Determine MRC boot mode
D0
1
1
0
1
0
0
0
0
MKTME early initialization
D1
1
1
0
1
0
0
0
1
SGX early initialization
D2
1
1
0
1
0
0
1
0
Memory margin test
D3
1
1
0
1
0
0
1
1
Internal use
D5
1
1
0
1
0
1
0
1
Internal use
D6
1
1
0
1
0
1
1
0
Offset training result
Driver Execution Environment (DXE) Phase
60
0
1
1
0
0
0
0
0
DXE core started
62
0
1
1
0
0
0
1
0
DXE setup initialization
68
0
1
1
0
1
0
0
0
DXE PCI host bridge initialization
69
0
1
1
0
1
0
0
1
DXE NB initialization
6A
0
1
1
0
1
0
1
0
DXE NB SMM initialization
70
0
1
1
1
0
0
0
0
DXE SB initialization
71
0
1
1
1
0
0
0
1
DXE SB SMM initialization
72
0
1
1
1
0
0
1
0
DXE SB devices initialization
78
0
1
1
1
1
0
0
0
DXE ACPI initialization
79
0
1
1
1
1
0
0
1
DXE CSM initialization
7D
0
1
1
1
1
1
0
1
DXE removable media detect
7E
0
1
1
1
1
1
1
0
DXE removable media detected
90
1
0
0
1
0
0
0
0
DXE BDS started
91
1
0
0
1
0
0
0
1
DXE BDS connect drivers
92
1
0
0
1
0
0
1
0
DXE PCI bus start
93
1
0
0
1
0
0
1
1
DXE PCI bus HPC initialization