NXP Semiconductors LPC11U3x User Manual

UM10462 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2016. All rights reserved.
User manual Rev. 5.5 — 21 December 2016 520 of 523
NXP Semiconductors
UM10462
Chapter 25: Supplementary information
20.13.3 Echo <setting> . . . . . . . . . . . . . . . . . . . . . . . 402
20.13.4 Write to RAM <start address>
<number of bytes> . . . . . . . . . . . . . . . . . . . . 402
20.13.5 Read Memory <address> <no. of bytes> . . . 403
20.13.6 Prepare sector(s) for write operation <start sector
number> <end sector number> . . . . . . . . . . 403
20.13.7 Copy RAM to flash <Flash address> <RAM
address> <no of bytes> . . . . . . . . . . . . . . . . 404
20.13.8 Go <address> <mode>. . . . . . . . . . . . . . . . . 405
20.13.9 Erase sector(s) <start sector number> <end
sector number>. . . . . . . . . . . . . . . . . . . . . . . 406
20.13.10 Blank check sector(s) <sector number> <end
sector number>. . . . . . . . . . . . . . . . . . . . . . . 407
20.13.11 Read Part Identification number . . . . . . . . . . 407
20.13.12 Read Boot code version number . . . . . . . . . 408
20.13.13 Compare <address1> <address2>
<no of bytes> . . . . . . . . . . . . . . . . . . . . . . . . 408
20.13.14 ReadUID. . . . . . . . . . . . . . . . . . . . . . . . . . . . 409
20.13.15 ISP Return Codes. . . . . . . . . . . . . . . . . . . . . 409
20.14 IAP commands. . . . . . . . . . . . . . . . . . . . . . . . 410
20.14.1 Prepare sector(s) for write operation . . . . . . 412
20.14.2 Copy RAM to flash . . . . . . . . . . . . . . . . . . . . 412
20.14.3 Erase Sector(s). . . . . . . . . . . . . . . . . . . . . . . 413
20.14.4 Blank check sector(s) . . . . . . . . . . . . . . . . . . 414
20.14.5 Read Part Identification number. . . . . . . . . . 414
20.14.6 Read Boot code version number . . . . . . . . . 414
20.14.7 Compare <address1> <address2>
<no of bytes> . . . . . . . . . . . . . . . . . . . . . . . . 415
20.14.8 Reinvoke ISP . . . . . . . . . . . . . . . . . . . . . . . . 415
20.14.9 ReadUID . . . . . . . . . . . . . . . . . . . . . . . . . . . 415
20.14.10 Erase page. . . . . . . . . . . . . . . . . . . . . . . . . . 416
20.14.11 Write EEPROM . . . . . . . . . . . . . . . . . . . . . . 416
20.14.12 Read EEPROM . . . . . . . . . . . . . . . . . . . . . . 416
20.14.13 IAP Status codes . . . . . . . . . . . . . . . . . . . . . 417
20.15 Debug notes . . . . . . . . . . . . . . . . . . . . . . . . . 417
20.15.1 Comparing flash images . . . . . . . . . . . . . . . 417
20.15.2 Serial Wire Debug (SWD) flash programming
interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . 417
20.16 Register description . . . . . . . . . . . . . . . . . . . 418
20.16.1 EEPROM BIST start address register . . . . . 418
20.16.2 EEPROM BIST stop address register . . . . . 418
20.16.3 EEPROM signature register . . . . . . . . . . . . 419
20.16.4 Flash controller registers . . . . . . . . . . . . . . . 419
20.16.4.1 Flash memory access register. . . . . . . . . . . 419
20.16.4.2 Flash signature generation . . . . . . . . . . . . . 420
20.16.4.3 Signature generation address and control
registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 420
20.16.4.4 Signature generation result registers. . . . . . 421
20.16.4.5 Flash module status register . . . . . . . . . . . . 421
20.16.4.6 Flash module status clear register . . . . . . . 422
20.16.4.7 Algorithm and procedure for signature
generation . . . . . . . . . . . . . . . . . . . . . . . . . . 422
Signature generation . . . . . . . . . . . . . . . . . . . 422
Content verification . . . . . . . . . . . . . . . . . . . . 422
Chapter 21: LPC11U3x/2x/1x Serial Wire Debugger (SWD)
21.1 How to read this chapter. . . . . . . . . . . . . . . . 424
21.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 424
21.3 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 424
21.4 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 424
21.5 Pin description . . . . . . . . . . . . . . . . . . . . . . . 424
21.6 Functional description . . . . . . . . . . . . . . . . . 425
21.6.1 Debug limitations . . . . . . . . . . . . . . . . . . . . . 425
21.6.2 Debug connections for SWD . . . . . . . . . . . . 425
21.6.3 Boundary scan. . . . . . . . . . . . . . . . . . . . . . . 426
Chapter 22: LPC11U3x/2x/1x Integer division routines
22.1 How to read this chapter. . . . . . . . . . . . . . . . 427
22.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 427
22.3 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 427
22.4 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 428
22.4.1 Initialization . . . . . . . . . . . . . . . . . . . . . . . . . 428
22.4.2 Signed division. . . . . . . . . . . . . . . . . . . . . . . 428
22.4.3 Unsigned division with remainder . . . . . . . . 429
Chapter 23: LPC11U3x/2x/1x I/O Handler
23.1 How to read this chapter. . . . . . . . . . . . . . . . 430
23.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430
23.3 Basic configuration . . . . . . . . . . . . . . . . . . . . 430
23.4 Description. . . . . . . . . . . . . . . . . . . . . . . . . . . 430
23.5 Register description . . . . . . . . . . . . . . . . . . . 430
23.6 Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . 430
23.6.1 I/O Handler software library applications . . . 430
23.6.1.1 I/O Handler I
2
S. . . . . . . . . . . . . . . . . . . . . . . 431
23.6.1.2 I/O Handler UART . . . . . . . . . . . . . . . . . . . . 431
23.6.1.3 I/O Handler I
2
C. . . . . . . . . . . . . . . . . . . . . . . 431
23.6.1.4 I/O Handler DMA . . . . . . . . . . . . . . . . . . . . . 431
Chapter 24: LPC11U3x/2x/1x Appendix ARM Cortex-M0
24.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . 432
24.2 About the Cortex-M0 processor and core
peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . 432
24.2.1 System-level interface . . . . . . . . . . . . . . . . . 433
24.2.2 Integrated configurable debug . . . . . . . . . . . 433
24.2.3 Cortex-M0 processor features summary . . . 433
24.2.4 Cortex-M0 core peripherals . . . . . . . . . . . . . 433
24.3 Processor. . . . . . . . . . . . . . . . . . . . . . . . . . . . 434

NXP Semiconductors LPC11U3x Specifications

General

Brand	NXP Semiconductors
Model	LPC11U3x
Category	Microcontrollers
Language	English