R&S SMA100B - Page 305

Clock synthesis
R&S
®
SMA100B
305User Manual 1178.3834.02 ─ 09
3. Observe the information on the home screen, "Clk Syn/Power Sens" tile.
The "Clk Syn/Power Sens" tile indicates that clock synthesis is activated and gives
an overview of the key parameters.
Settings
State............................................................................................................................305
Output Type.................................................................................................................305
Frequency................................................................................................................... 306
Level............................................................................................................................306
DC Offset State...........................................................................................................306
DC Offset.....................................................................................................................307
Voltage........................................................................................................................ 307
Delta Phase.................................................................................................................307
Reset Delta Phase Display......................................................................................... 307
User Variation..............................................................................................................307
└ Variation Active............................................................................................. 307
└ Variation Step................................................................................................307
State
Activates/deactivates generation of a system clock.
The signal is output at the [Clk Syn] connector.
Remote command:
:CSYNthesis:STATe on page 470
Output Type
Defines the shape of the generated clock signal.