Siemens Simatic S7 Series

References
E.3 High-speed counter summary
S7-200 SMART
System Manual, 09/2015, A5E03822230-AC
695
E.3
High-speed counter summary
Table E- 3 S7-200 SMART HSC input assignments and capabilities
Clock A
Dir / Clock B
Reset
Single phase max.
clock/input rate
Dual phase / AB quadrature phase max.
clock/input rate
HSC0 I0.0 I0.1 I0.4 200 kHz (S model CPUs)
1
100 kHz (C model CPUs)
2
100 kHz (S model CPUs)
(Maximum 1x count rate = 100 kHz)
(Maximum 4x count rate = 400 kHz)
50 kHz (C model CPUs)
(Maximum 1x count rate = 50 kHz)
(Maximum 4x count rate = 200 kHz)
HSC1 I0.1 200 kHz (S model CPUs)
100 kHz (C model CPUs)
HSC2 I0.2 I0.3 I0.5 200 kHz (S model CPUs)
100 kHz (C model CPUs)
100 kHz (S model CPUs)
(Maximum 1x count rate = 100 kHz)
(Maximum 4x count rate = 400 kHz)
50 kHz (C model CPUs)
(Maximum 1x count rate = 50 kHz)
(Maximum 4x count rate = 200 kHz)
HSC3 I0.3 200 kHz (S model CPUs)
100 kHz (C model CPUs)
1
S model CPUs: SR20/ST20, SR30/ST30, SR40/ST40, SR60/ST60
2
C model CPUs: CR40, CR60