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GigaDevice Semiconductor GD32VF103 User Manual

GigaDevice Semiconductor GD32VF103
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GD32VF103 User Manual
1
GigaDevice Semiconductor Inc.
GD32VF103
RISC-V 32-bit MCU
User Manual
Revision 1.0
( Jun. 2019 )

Table of Contents

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GigaDevice Semiconductor GD32VF103 Specifications

General IconGeneral
BrandGigaDevice Semiconductor
ModelGD32VF103
CategoryMicrocontrollers
LanguageEnglish

Summary

System and Memory Architecture

RISC-V CPU

RISC-V CPU target for embedded applications requiring low energy consumption and small area.

Memory Map

Organizes program memory, data memory, registers, and I/O ports within a linear 4-Gbyte address space.

Reset and Clock Unit (RCU)

Reset Control Unit (RCTL)

Controls three kinds of reset: power reset, system reset, and backup domain reset.

Clock Control Unit (CCTL)

Provides frequencies and clock functions including oscillators, PLLs, prescalers, and clock gating.

General-Purpose and Alternate-Function I/Os (GPIO and AFIO)

Analog-to-Digital Converter (ADC)

Introduction

12-bit ADC with 18 multiplexed channels for analog signal conversion.

Main Features

High performance, configurable resolution, sampling rate, self-calibration, DMA support.

Watchdog Timer (WDGT)

Free Watchdog Timer (FWDGT)

Hardware timing circuitry to detect system failures due to software malfunctions.

Window Watchdog Timer (WWDGT)

Detects system failures due to software malfunctions using a windowed counter.

Universal Synchronous/Asynchronous Receiver/Transmitter (USART)

Controller Area Network (CAN)

Universal Serial Bus Full-Speed Interface (USBFS)

Overview

Provides USB-connection solution for portable devices, supporting host, device, and OTG modes.

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