GigaDevice Semiconductor GD32VF103 - DAC1 Data Output Register (DAC1_DO)

GD32VF103 User Manual
201
Bits
Fields
Descriptions
31:12
Reserved
Must be kept at reset value
11:0
DAC0_DO [11:0]
DAC0 data output
These bits, which are read only, reflect the data that is being converted by DAC0.
12.4.13. DAC1 data output register (DAC1_DO)
Address offset: 0x30
Reset value: 0x0000 0000
This register has to be accessed by word(32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Reserved
DAC1_DO [11:0]
r
Bits
Fields
Descriptions
31:12
Reserved
Must be kept at reset value
11:0
DAC1_DO [11:0]
DAC1 data output
These bits, which are read only, reflect the data that is being converted by DAC1.