GigaDevice Semiconductor GD32VF103 - Transmit Mailbox Identifier Register (Can_Tmix) (X=0

GD32VF103 User Manual
452
Bit segment 1 time quantum=BS1[3:0]+1
15:10
Reserved
Must be kept at reset value
9:0
BAUDPSC[9:0]
Baud rate prescaler
The CAN baud rate prescaler
20.4.9. Transmit mailbox identifier register (CAN_TMIx) (x=0..2)
Address offset: 0x180, 0x190, 0x1A0
Reset value: 0xXXXX XXXX (bit0=0)
This register has to be accessed by word(32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SFID[10:0]/EFID[28:18]
EFID[17:13]
rw
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
EFID[12:0]
FF
FT
TEN
rw
rw
rw
rw
Bits
Fields
Descriptions
31:21
SFID[10:0]/EFID[28:1
8]
The frame identifier
SFID[10:0]: Standard format frame identifier
EFID[28:18]: Extended format frame identifier
20:16
EFID[17:13]
The frame identifier
EFID[17:13]: Extended format frame identifier
15:3
EFID[12:0]
The frame identifier
EFID[12:0]: Extended format frame identifier
2
FF
Frame format
0: Standard format frame
1: Extended format frame
1
FT
Frame type
0: Data frame
1: Remote frame
0
TEN
Transmit enable
This bit is set by the software when one frame will be transmitted and reset by the
hardware when the transmit mailbox is empty.
0: Transmit disable
1: Transmit enable