GigaDevice Semiconductor GD32VF103 - Product ID Register (FMC_PID)

GD32VF103 User Manual
46
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
WP[31:16]
r
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
WP[1
r
Bits
Fields
Descriptions
31:0
WP[31:0]
Store WP of option bytes block after system reset
2.4.9. Product ID register (FMC_PID)
Address offset: 0x100
Reset value: 0xXXXX XXXX
This register has to be accessed by word(32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
PID[31:16]
r
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
PID[15:0]
r
Bits
Fields
Descriptions
31:0
PID[31:0]
Product reserved ID code register 0
These bits are read only by software.
These bits are unchanged constant after power on. These bits are one time program
when the chip produced.