GigaDevice Semiconductor GD32VF103 - Sample Time Register 1 (ADC_SAMPT1)

GD32VF103 User Manual
180
2:0
SPT10[2:0]
Channel sample time
000: 1.5 cycles
001: 7.5 cycles
010: 13.5 cycles
011: 28.5 cycles
100: 41.5 cycles
101: 55.5 cycles
110: 71.5 cycles
111: 239.5 cycles
11.8.5. Sample time register 1 (ADC_SAMPT1)
Address offset: 0x10
Reset value: 0x0000 0000
This register has to be accessed by word(32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
SPT9[2:0]
SPT8[2:0]
SPT7[2:0]
SPT6[2:0]
SPT5[2:1]
rw
rw
rw
rw
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SPT5[0]
SPT4[2:0]
SPT3[2:0]
SPT2[2:0]
SPT1[2:0]
SPT0[2:0]
rw
rw
rw
rw
rw
rw
Bits
Fields
Descriptions
31:30
Reserved
Must be kept at reset value
29:27
SPT9[2:0]
refer to SPT0[2:0] description
26:24
SPT8[2:0]
refer to SPT0[2:0] description
23:21
SPT7[2:0]
refer to SPT0[2:0] description
20:18
SPT6[2:0]
refer to SPT0[2:0] description
17:15
SPT5[2:0]
refer to SPT0[2:0] description
14:12
SPT4[2:0]
refer to SPT0[2:0] description
11:9
SPT3[2:0]
refer to SPT0[2:0] description
8:6
SPT2[2:0]
refer to SPT0[2:0] description
5:3
SPT1[2:0]
refer to SPT0[2:0] description
2:0
SPT0[2:0]
Channel sample time
000: 1.5 cycles
001: 7.5 cycles
010: 13.5 cycles