GigaDevice Semiconductor GD32VF103 - RTC Counter High Register (RTC_CNTH); RTC Counter Low Register (RTC_CNTL)

GD32VF103 User Manual
220
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DIV[15:0]
r
Bits
Fields
Descriptions
31:16
Reserved
Must be kept at reset value
15:0
DIV[15:0]
RTC divider value low
The RTC divider register is reloaded by hardware when the RTC prescaler or RTC
counter register updated.
14.4.7. RTC counter high register (RTC_CNTH)
Address offset: 0x18
Reset value: 0x0000
This register can be accessed by half-word (16-bit) or word (32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CNT[31:16]
rw
Bits
Fields
Descriptions
31:16
Reserved
Must be kept at reset value
15:0
CNT[31:16]
RTC counter value high
14.4.8. RTC counter low register (RTC_CNTL)
Address offset: 0x1C
Reset value: 0x0000
This register can be accessed by half-word (16-bit) or word (32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CNT[15:0]
rw