GigaDevice Semiconductor GD32VF103 - Page 353

GD32VF103 User Manual
353
15:8
GUAT[7:0]
Guard time value in Smartcard mode
TC flag assertion time is delayed by GUAT[7:0] baud clock cycles.
This bit field cannot be written when the USART is enabled (UEN=1).
These bits are reserved for UART3/4.
7:0
PSC[7:0]
When the USART IrDA low-power mode is enabled, these bits specify the division
factor that is used to divide the peripheral clock (PCLK1/PCLK2) to generate the
low-power frequency.
00000000: Reserved - never program this value
00000001: Divided by 1
00000010: Divided by 2
...
11111111: Divided by 255
When the USART works in IrDA normal mode, these bits must be set to 00000001.
When the USART smartcard mode is enabled, the PSC [4:0] bits specify the division
factor that is used to divide the peripheral clock (APB1/APB2) to generate the
smartcard clock (CK). The actual division factor is twice as the PSC [4:0] value.
00000: Reserved - never program this value
00001: Divided by 2
00010: Divided by 4
...
11111: Divided by 62
The PSC [7:5] bits are reserved in smartcard mode.
This bit field cannot be written when the USART is enabled (UEN=1).