GigaDevice Semiconductor GD32VF103 - Page 13

GD32VF103 User Manual
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21.3. Block diagram ............................................................................................................... 462
21.4. Signal description ......................................................................................................... 462
21.5. Function overview ........................................................................................................ 462
21.5.1. USBFS clocks and working modes .............................................................................................. 462
21.5.2. USB host function ........................................................................................................................... 464
21.5.3. USB device function ....................................................................................................................... 466
21.5.4. OTG function overview .................................................................................................................. 467
21.5.5. Data FIFO ........................................................................................................................................ 468
21.5.6. Operation guide............................................................................................................................... 471
21.6. Interrupts ..................................................................................................................... 475
21.7. Register definition ........................................................................................................ 477
21.7.1. Global control and status registers ............................................................................................... 477
21.7.2. Host control and status registers .................................................................................................. 498
21.7.3. Device control and status registers .............................................................................................. 510
21.7.4. Power and clock control register (USBFS_PWRCLKCTL) ....................................................... 534
22. Revision history .................................................................................................... 535