GigaDevice Semiconductor GD32VF103 - Page 9

GD32VF103 User Manual
9
14.4.6. RTC divider low register (RTC_DIVL) .......................................................................................... 219
14.4.7. RTC counter high register (RTC_CNTH) .................................................................................... 220
14.4.8. RTC counter low register (RTC_CNTL)....................................................................................... 220
14.4.9. RTC alarm high register (RTC_ALRMH) ..................................................................................... 221
14.4.10. RTC alarm low register (RTC_ALRML) ................................................................................... 221
15. Timer(TIMERx) ...................................................................................................... 222
15.1. Advanced timer (TIMERx, x=0) ...................................................................................... 223
15.1.1. Overview .......................................................................................................................................... 223
15.1.2. Characteristics................................................................................................................................. 223
15.1.3. Block diagram .................................................................................................................................. 224
15.1.4. Function overview ........................................................................................................................... 224
15.1.5. TIMERx registers(x=0) ................................................................................................................... 254
15.2. General level0 timer (TIMERx, x=1, 2, 3, 4) ..................................................................... 279
15.2.1. Overview .......................................................................................................................................... 279
15.2.2. Characteristics................................................................................................................................. 279
15.2.3. Block diagram .................................................................................................................................. 279
15.2.4. Function overview ........................................................................................................................... 280
15.2.5. TIMERx registers(x=1,2,3,4) ......................................................................................................... 297
15.3. Basic timer (TIMERx, x=5, 6) .......................................................................................... 318
15.3.1. Overview .......................................................................................................................................... 318
15.3.2. Characteristics................................................................................................................................. 318
15.3.3. Block diagram .................................................................................................................................. 318
15.3.4. Function overview ........................................................................................................................... 318
15.3.5. TIMERx registers(x=5,6) ................................................................................................................ 323
16. Universal synchronous/asynchronous receiver /transmitter (USART) ........ 328
16.1. Overview ...................................................................................................................... 328
16.2. Characteristics .............................................................................................................. 328
16.3. Function overview ........................................................................................................ 329
16.3.1. USART frame format ...................................................................................................................... 330
16.3.2. Baud rate generation ...................................................................................................................... 331
16.3.3. USART transmitter .......................................................................................................................... 331
16.3.4. USART receiver .............................................................................................................................. 333
16.3.5. Use DMA for data buffer access ................................................................................................... 334
16.3.6. Hardware flow control .................................................................................................................... 335
16.3.7. Multi-processor communication .................................................................................................... 336
16.3.8. LIN mode .......................................................................................................................................... 337
16.3.9. Synchronous mode ......................................................................................................................... 338
16.3.10. IrDA SIR ENDEC mode ............................................................................................................. 339
16.3.11. Half-duplex communication mode ............................................................................................ 341
16.3.12. Smartcard (ISO7816-3) mode .................................................................................................. 341
16.3.13. USART interrupts ........................................................................................................................ 342