Hioki 8835-01 - System Operation

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14.12 System Operation
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Memory control circuit
Logic
probe
Input
amplifie
r
A/D
Photo
coupler
Input
amplifie
r
A/D
Photo
coupler
Analog uni
t
Logic input
Stored
RAM
FD
32-bit CPU
Logic
probe
GP-IB card
RS-232C car
d
CH1
CH2
PC card
LCD
Control
4 probe
s
Printer card
Input
amplifie
r
A/D
Photo
coupler
Input
amplifie
r
A/D
Photo
coupler
CH7
CH8
Block Diagram
1
4.12 System Operation
System operation is explained according to the block diagram.
(1) All system operations are controlled by a 32-bit RISC CPU.
(2) Each input unit incorporates high-speed 12-bit A/D converters which are
connected to the main unit via a photocoupler integrated in each input unit.
Each channel has its own power supply, to assure electrical isolation from the
main unit.
(3) Measurement data stored in memory are processed by the CPU, displayed on
the LCD screen, and output to the printer. Output to floppy disk, the SRAM
card, flash ATA card, GP-IB card, RS-232C card or printer card is also
provided.