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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 User Manual

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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Functional Description
136 Datasheet
The address shifting is shown in Table 5-13.
NOTE: The least significant bit of the Page Register is dropped in 16-bit shifted mode.
5.5.4 Autoinitialize
By programming a bit in the DMA Channel Mode Register, a channel may be set up as
an autoinitialize channel. When a channel undergoes autoinitialization, the original
values of the Current Page, Current Address and Current Byte/Word Count Registers
are automatically restored from the Base Page, Address, and Byte/Word Count
Registers of that channel following TC. The Base Registers are loaded simultaneously
with the Current Registers by the microprocessor when the DMA channel is
programmed and remain unchanged throughout the DMA service. The mask bit is not
set when the channel is in autoinitialize. Following autoinitialize, the channel is ready to
perform another DMA service, without processor intervention, as soon as a valid DREQ
is detected.
5.5.5 Software Commands
There are three additional special software commands that the DMA controller can
execute. The three software commands are:
Clear Byte Pointer Flip-Flop
•Master Clear
Clear Mask Register
They do not depend on any specific bit pattern on the data bus.
Table 5-13. Address Shifting in 16-Bit I/O DMA Transfers
Output
Address
8-Bit I/O Programmed
Address (Ch 0–3)
16-Bit I/O Programmed
Address (Ch 5–7)
(Shifted)
A0
A[16:1]
A[23:17]
A0
A[16:1]
A[23:17]
0
A[15:0]
A[23:17]

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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Specifications

General IconGeneral
BrandIntel
Model6 SERIES CHIPSET - DATASHEET 01-2011
CategoryController
LanguageEnglish

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