Functional Description
206 Datasheet
5.18.6.1 Aborts on USB 2.0-Initiated Memory Reads
If a read initiated by the EHC is aborted, the EHC treats it as a fatal host error. The
following actions are taken when this occurs:
• The Host System Error status bit is set.
• The DMA engines are halted after completing up to one more transaction on the
USB interface.
• If enabled (by the Host System Error Enable), then an interrupt is generated.
• If the status is Master Abort, then the Received Master Abort bit in configuration
space is set.
• If the status is Target Abort, then the Received Target Abort bit in configuration
space is set.
• If enabled (by the SERR Enable bit in the function’s configuration space), then the
Signaled System Error bit in configuration bit is set.
5.18.7 USB 2.0 Power Management
5.18.7.1 Pause Feature
This feature allows platforms to dynamically enter low-power states during brief
periods when the system is idle (that is, between keystrokes). This is useful for
enabling power management features in the PCH. The policies for entering these states
typically are based on the recent history of system bus activity to incrementally enter
deeper power management states. Normally, when the EHC is enabled, it regularly
accesses main memory while traversing the DMA schedules looking for work to do; this
activity is viewed by the power management software as a non-idle system, thus
preventing the power managed states to be entered. Suspending all of the enabled
ports can prevent the memory accesses from occurring, but there is an inherent
latency overhead with entering and exiting the suspended state on the USB ports that
makes this unacceptable for the purpose of dynamic power management. As a result,
the EHCI software drivers are allowed to pause the EHC DMA engines when it knows
that the traffic patterns of the attached devices can afford the delay. The pause only
prevents the EHC from generating memory accesses; the SOF packets continue to be
generated on the USB ports (unlike the suspended state).
5.18.7.2 Suspend Feature
The Enhanced Host Controller Interface (EHCI) For Universal Serial Bus Specification,
Section 4.3 describes the details of Port Suspend and Resume.
5.18.7.3 ACPI Device States
The USB 2.0 function only supports the D0 and D3 PCI Power Management states.
Notes regarding the PCH implementation of the Device States:
1. The EHC hardware does not inherently consume any more power when it is in the
D0 state than it does in the D3 state. However, software is required to suspend or
disable all ports prior to entering the D3 state such that the maximum power
consumption is reduced.
2. In the D0 state, all implemented EHC features are enabled.
3. In the D3 state, accesses to the EHC memory-mapped I/O range will master abort.
Note that, since the Debug Port uses the same memory range, the Debug Port is
only operational when the EHC is in the D0 state.
4. In the D3 state, the EHC interrupt must never assert for any reason. The internal
PME# signal is used to signal wake events, etc.
5. When the Device Power State field is written to D0 from D3, an internal reset is
generated. See section EHC Resets for general rules on the effects of this reset.
6. Attempts to write any other value into the Device Power State field other than 00b
(D0 state) and 11b (D3 state) will complete normally without changing the current
value in this field.
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