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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 User Manual

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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Functional Description
208 Datasheet
5.18.9.1 Theory of Operation
There are two operational modes for the USB debug port:
1. Mode 1 is when the USB port is in a disabled state from the viewpoint of a standard
host controller driver. In Mode 1, the Debug Port controller is required to generate a
“keepalive” packets less than 2 ms apart to keep the attached debug device from
suspending. The keepalive packet should be a standalone 32-bit SYNC field.
2. Mode 2 is when the host controller is running (that is, host controllers Run/Stop#
bit is 1). In Mode 2, the normal transmission of SOF packets will keep the debug
device from suspending.
Behavioral Rules
1. In both modes 1 and 2, the Debug Port controller must check for software
requested debug transactions at least every 125 microseconds.
2. If the debug port is enabled by the debug driver, and the standard host controller
driver resets the USB port, USB debug transactions are held off for the duration of
the reset and until after the first SOF is sent.
3. If the standard host controller driver suspends the USB port, then USB debug
transactions are held off for the duration of the suspend/resume sequence and until
after the first SOF is sent.
4. The ENABLED_CNT bit in the debug register space is independent of the similar
port control bit in the associated Port Status and Control register.
Table 5-43 shows the debug port behavior related to the state of bits in the debug
registers as well as bits in the associated Port Status and Control register.
Table 5-43. Debug Port Behavior
OWNER_CNT ENABLED_CT
Port
Enable
Run /
Stop
Suspend Debug Port Behavior
0XXXX
Debug port is not being used. Normal
operation.
10XXX
Debug port is not being used. Normal
operation.
1100X
Debug port in Mode 1. SYNC keepalives sent
plus debug traffic
1101X
Debug port in Mode 2. SOF (and only SOF) is
sent as keepalive. Debug traffic is also sent.
Note that no other normal traffic is sent out
this port, because the port is not enabled.
11100
Invalid. Host controller driver should never
put controller into this state (enabled, not
running and not suspended).
1 1 1 0 1 Port is suspended. No debug traffic sent.
11110
Debug port in Mode 2. Debug traffic is
interspersed with normal traffic.
1 1 1 1 1 Port is suspended. No debug traffic sent.

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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Specifications

General IconGeneral
BrandIntel
Model6 SERIES CHIPSET - DATASHEET 01-2011
CategoryController
LanguageEnglish

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