Serial Peripheral Interface (SPI)
832 Datasheet
21.2 Flash Descriptor Records
The following sections describe the data structure of the Flash Descriptor on the SPI
device. These are not registers within the PCH.
21.3 OEM Section
Memory Address: F00h Default Value: Size: 256 Bytes
256 Bytes are reserved at the top of the Flash Descriptor for use by the OEM. The
information stored by the OEM can only be written during the manufacturing process as
the Flash Descriptor read/write permissions must be set to Read Only when the
computer leaves the manufacturing floor. The PCH Flash controller does not read this
information. FFh is suggested to reduce programming time.
21.4 GbE SPI Flash Program Registers
The GbE Flash registers are memory-mapped with a base address MBARB found in the
GbE LAN register chapter Device 25: Function 0: Offset 14h. The individual registers
are then accessible at MBARB + Offset as indicated in the following table.
These memory mapped registers must be accessed in byte, word, or DWord quantities.
Note: These register are only applicable when SPI flash is used in descriptor mode.
Table 21-2. Gigabit LAN SPI Flash Program Register Address Map
(GbE LAN Memory Mapped Configuration Registers) (Sheet 1 of 2)
MBARB +
Offset
Mnemonic Register Name Default Access
00h–03h GLFPR Gigabit LAN Flash Primary Region 00000000h
04h–05h HSFSTS Hardware Sequencing Flash Status 0000h
06h–07h HSFCTL Hardware Sequencing Flash Control 0000h
08h–0Bh FADDR Flash Address 00000000h
0Ch–0Fh Reserved Reserved 00000000h
10h–13h FDATA0 Flash Data 0 00000000h
14h–4Fh Reserved Reserved 00000000h
50h–53h FRACC Flash Region Access Permissions 00000000h
54h–57h FREG0 Flash Region 0 00000000h
58h–5Bh FREG1 Flash Region 1 00000000h
5Ch–5F FREG2 Flash Region 2 00000000h
60h–63h FREG3 Flash Region 3 00000000h
64h–73h Reserved Reserved for Future Flash Regions
74h–77h FPR0 Flash Protected Range 0 00000000h
78h–7Bh FPR1 Flash Protected Range 1 00000000h
7Ch–8Fh Reserved Reserved
90h SSFSTS Software Sequencing Flash Status 00h
91h–93h SSFCTL Software Sequencing Flash Control 000000h
94h–95h PREOP Prefix Opcode Configuration 0000h
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