Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Output Enable Delay; USB Rise and Fall Times; USB Jitter

Datasheet 341
Electrical Characteristics
Figure 8-16. Output Enable Delay
Figure 8-17. USB Rise and Fall Times
Figure 8-18. USB Jitter
Clock
Output
Output
Enable
Delay
VT
1.5V
Differential
Data Lines
90%
10%
10%
90%
t
R
t
F
Rise Time Fall Time
C
L
C
L
Low-speed: 75 ns at C
L
= 50 pF, 300 ns at C
L
= 350 pF
Full-speed: 4 to 20 ns at C
L
= 50 pF
High-speed: 0.8 to 1.2 ns at C
L
= 10 pF
Paired
Transitions
Consecutive
Transitions
Crossover
Points
T period
Differential
Data Lines
Jitter