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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 User Manual

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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Signal Description
72 Datasheet
2.18 Testability Signals
NOTE: JTAG Pin definitions are from IEEE Standard Test Access Port and Boundary-Scan
Architecture (IEEE Std. 1149.1-2001)
2.19 Clock Signals
Table 2-18. Testability Signals
Name Type Description
JTAG_TCK I
Test Clock Input (TCK): The test clock input provides the clock
for the JTAG test logic.
JTAG_TMS I
Test Mode Select (TMS): The signal is decoded by the Test
Access Port (TAP) controller to control test operations.
JTAG_TDI I
Test Data Input (TDI): Serial test instructions and data are
received by the test logic at TDI.
JTAG_TDO OD
Test Data Output (TDO): TDO is the serial output for test
instructions and data from the test logic defined in this standard.
Table 2-19. Clock Interface Signals (Sheet 1 of 3)
Name Type Description
CLKOUT_ITPXDP_P,
CLKOUT_ITPXDP_N
O
100 MHz Differential output to processor XDP/ITP connector on
platform
CLKOUT_DP_P,
CLKOUT_DP_N
O 120 MHz Differential output for DisplayPort reference
CLKIN_DMI_P,
CLKIN_DMI_N
I
Unused.
NOTE: External pull-down input termination is required
CLKOUT_DMI_P,
CLKOUT_DMI_N
O
100 MHz PCIe Gen2 specification jitter tolerant differential
output to processor.
CLKIN_SATA_P,
CLKIN_SATA_N
I
Unused.
NOTE: External pull-down input termination is required
CLKIN_DOT96_P,
CLKIN_DOT96_N
I
Unused.
NOTE: External pull-down input termination is required
XTAL25_IN I Connection for 25 MHz crystal to PCH oscillator circuit.
XTAL25_OUT O Connection for 25 MHz crystal to PCH oscillator circuit.
REFCLK14IN I
Unused.
NOTE: External pull-down input termination is required
CLKOUT_PEG_A_P,
CLKOUT_PEG_A_N
O
100 MHz Gen2 PCIe specification differential output to PCI
Express* Graphics device
CLKOUT_PEG_B_P,
CLKOUT_PEG_B_N
O
100 MHz Gen2 PCIe specification differential output to a
second PCI Express Graphics device
PEG_A_CLKRQ# /
GPIO47 (Mobile
Only),
PEG_B_CLKRQ# /
GPIO56
(Mobile Only)
I
Clock Request Signals for PCIe Graphics SLOTS
Can instead by used as GPIOs
NOTE: External pull-up resistor required if used for CLKREQ#
functionality

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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Specifications

General IconGeneral
BrandIntel
Model6 SERIES CHIPSET - DATASHEET 01-2011
CategoryController
LanguageEnglish

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