Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Controller Link; Controller Link Signals; Serial Peripheral Interface (SPI); Serial Peripheral Interface (SPI) Signals

Datasheet 71
Signal Description
2.15 Controller Link
2.16 Serial Peripheral Interface (SPI)
2.17 Thermal Signals
Table 2-15. Controller Link Signals
Signal Name Type Description
CL_RST1# O Controller Link Reset: Reserved.
CL_CLK1 I/O Controller Link Clock: Reserved.
CL_DATA1 I/O Controller Link Data: Reserved.
Table 2-16. Serial Peripheral Interface (SPI) Signals
Name Type Description
SPI_CS0# O SPI Chip Select 0: Used as the SPI bus request signal.
SPI_CS1# OSPI Chip Select 1: Used as the SPI bus request signal.
SPI_MISO I SPI Master IN Slave OUT: Data input pin for PCH.
SPI_MOSI I/O SPI Master OUT Slave IN: Data output pin for PCH.
SPI_CLK O
SPI Clock: SPI clock signal, during idle the bus owner will drive the
clock signal low. 17.86 MHz and 31.25 MHz.
Table 2-17. Thermal Signals
Signal Name Type Description
PECI I/O
Platform Environment Control Interface: Single-wire, serial
bus.