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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - LVDS Interface AC Characteristics at Various Frequencies

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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Electrical Characteristics
318 Datasheet
Table 8-22. LVDS Interface AC characteristics at Various Frequencies (Sheet 1 of 2)
Symbol Parameter Min Nom Max Unit Figures Notes
LLHT
LVDS Low-to-High
Transition Time
0.25 0.5 0.75 ns
Figure 8-26
1, Across receiver
termination
LHLT
LVDS High-to-Low
Transition Time
0.25 0.5 0.75 ns
1, Across receiver
termination
Frequency = 40-MHz
TPPos0
Transmitter Output
Pulse for Bit 0
-0.25 0 0.25 ns
Figure 8-27
TPPos1
Transmitter Output
Pulse for Bit 1
3.32 3.57 3.82 ns
TPPos2
Transmitter Output
Pulse for Bit 2
6.89 7.14 7.39 ns
TPPos3
Transmitter Output
Pulse for Bit 3
10.46 10.71 10.96 ns
TPPos4
Transmitter Output
Pulse for Bit 4
14.04 14.29 14.54 ns
TPPos5
Transmitter Output
Pulse for Bit 5
17.61 17.86 18.11 ns
TPPos6
Transmitter Output
Pulse for Bit 6
21.18 21.43 21.68 ns
TJCC
Transmitter Jitter
Cycle-to-Cycle
350 370 ps
Frequency = 65-MHz
TPPos0
Transmitter Output
Pulse for Bit 0
-0.20 0 0.20 ns
Figure 8-27
TPPos1
Transmitter Output
Pulse for Bit 1
2.00 2.20 2.40 ns
TPPos2
Transmitter Output
Pulse for Bit 2
4.20 4.40 4.60 ns
TPPos3
Transmitter Output
Pulse for Bit 3
6.39 6.59 6.79 ns
TPPos4
Transmitter Output
Pulse for Bit 4
8.59 8.79 8.99 ns
TPPos5
Transmitter Output
Pulse for Bit 5
10.79 10.99 11.19 ns
TPPos6
Transmitter Output
Pulse for Bit 6
12.99 13.19 13.39 ns
TJCC
Transmitter Jitter
Cycle-to-Cycle
250 ps

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