Datasheet 833
Serial Peripheral Interface (SPI)
21.4.1 GLFPR –Gigabit LAN Flash Primary Region Register
(GbE LAN Memory Mapped Configuration Registers)
Memory Address: MBARB + 00h Attribute: RO
Default Value: 00000000h Size: 32 bits
21.4.2 HSFS—Hardware Sequencing Flash Status Register
(GbE LAN Memory Mapped Configuration Registers)
Memory Address: MBARB + 04h Attribute: RO, R/WC, R/W
Default Value: 0000h Size: 16 bits
96h–97h OPTYPE Opcode Type Configuration 0000h
98h–9Fh OPMENU Opcode Menu Configuration
00000000
00000000h
A0h–DFh Reserved Reserved
Table 21-2. Gigabit LAN SPI Flash Program Register Address Map
(GbE LAN Memory Mapped Configuration Registers) (Sheet 2 of 2)
MBARB +
Offset
Mnemonic Register Name Default Access
Bit Description
31:29 Reserved
28:16
GbE Flash Primary Region Limit (PRL)— RO. This specifies address bits 24:12 for
the Primary Region Limit.
The value in this register loaded from the contents in the Flash
Descriptor.FLREG3.Region Limit
15:13 Reserved
12:0
GbE Flash Primary Region Base (PRB) — RO. This specifies address bits 24:12 for
the Primary Region Base
The value in this register is loaded from the contents in the Flash
Descriptor.FLREG3.Region Base
Bit Description
15
Flash Configuration Lock-Down (FLOCKDN)— R/W. When set to 1, those Flash
Program Registers that are locked down by this FLOCKDN bit cannot be written. Once
set to 1, this bit can only be cleared by a hardware reset due to a global reset or host
partition reset in an Intel
®
ME enabled system.
14
Flash Descriptor Valid (FDV)— RO. This bit is set to a 1 if the Flash Controller read
the correct Flash Descriptor Signature.
If the Flash Descriptor Valid bit is not 1, software cannot use the Hardware Sequencing
registers, but must use the software sequencing registers. Any attempt to use the
Hardware Sequencing registers will result in the FCERR bit being set.
13
Flash Descriptor Override Pin Strap Status (FDOPSS)— RO. This bit indicates the
condition of the Flash Descriptor Security Override / Intel ME Debug Mode Pin-Strap.
0 = The Flash Descriptor Security Override / Intel ME Debug Mode strap is set using
external pull-up on HDA_SDO
1 = No override
12:6 Reserved
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