Intel 6 SERIES CHIPSET - DATASHEET 01-2011 User Manual

Datasheet 39
Note: Not all features are available on all PCH SKUs. See Section 1.3 for more details.
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 External Glue Integration
—Integrated Pull-down and Series resistors
on USB
 Enhanced DMA Controller
—Two cascaded 8237 DMA controllers
—Supports LPC DMA
 SMBus
—Interface speeds of up to 100 kbps
—Flexible SMBus/SMLink architecture to
optimize for ASF
—Provides independent manageability bus
through SMLink interface
—Supports SMBus 2.0 Specification
—Host interface allows processor to
communicate using SMBus
—Slave interface allows an internal or
external microcontroller to access system
resources
—Compatible with most two-wire
components that are also I
2
C compatible
 High Precision Event Timers
—Advanced operating system interrupt
scheduling
 Timers Based on 82C54
—System timer, Refresh request, Speaker
tone output
 Real-Time Clock
—256 byte battery-backed CMOS RAM
—Integrated oscillator components
—Lower Power DC/DC Converter
implementation
 System TCO Reduction Circuits
—Timers to generate SMI# and Reset upon
detection of system hang
—Timers to detect improper processor reset
—Supports ability to disable external devices
 JTAG
—Boundary Scan for testing during board
manufacturing
 Serial Peripheral Interface (SPI)
—Supports up to two SPI devices
—Supports 20 MHz, 33 MHz, and 50 MHz SPI
devices
—Support up to two different erase
granularities
 Firmware Hub I/F supports BIOS Memory size
up to 8 MB
 Low Pin Count (LPC) I/F
—Supports two Master/DMA devices.
—Support for Security Device (Trusted
Platform Module) connected to LPC
 Interrupt Controller
—Supports up to eight PCI interrupt pins
—Supports PCI 2.3 Message Signaled
Interrupts
—Two cascaded 82C59 with 15 interrupts
—Integrated I/O APIC capability with 24
interrupts
—Supports Processor System Bus interrupt
delivery
 1.05 V operation with 1.5/3.3 V I/O
—5 V tolerant buffers on PCI, USB and
selected Legacy signals
 1.05 V Core Voltage
 Integrated Voltage Regulators for select power
rails
 GPIO
—Open-Drain, Inversion
—GPIO lock down
 Analog Display (VGA)
 Digital Display
—Three Digital Ports capable of supporting
HDMI/DVI, DisplayPort*, and embedded
DisplayPort (eDP*)
—One Digital Port supporting SDVO
—LVDS
—Integrated DisplayPort/HDMI Audio
—HDCP Support
 Package
—27 mm x 27 mm FCBGA (Desktop Only)
—25 mm x 25 mm FCBGA (Mobile Only)

Intel 6 SERIES CHIPSET - DATASHEET 01-2011 Specifications

General

Brand	Intel
Model	6 SERIES CHIPSET - DATASHEET 01-2011
Category	Controller
Language	English