Chipset Configuration Registers
390 Datasheet
10.1.44 D25IR—Device 25 Interrupt Route Register
Offset Address: 3150–3151h Attribute: R/W
Default Value: 3210h Size: 16-bit
Bit Description
15 Reserved
14:12
Interrupt D Pin Route (IDR): — R/W. Indicates which physical pin on the PCH is
connected to the INTD# pin reported for device 25 functions:
0h = PIRQA#
1h = PIRQB#
2h = PIRQC#
3h = PIRQD# (Default)
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
11 Reserved
10:8
Interrupt C Pin Route (ICR) — R/W. Indicates which physical pin on the PCH is
connected to the INTC# pin reported for device 25 functions.
0h = PIRQA#
1h = PIRQB#
2h = PIRQC# (Default)
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
7 Reserved
6:4
Interrupt B Pin Route (IBR) — R/W. Indicates which physical pin on the PCH is
connected to the INTB# pin reported for device 25 functions.
0h = PIRQA#
1h = PIRQB# (Default)
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
3 Reserved
2:0
Interrupt A Pin Route (IAR) — R/W. Indicates which physical pin on the PCH is
connected to the INTA# pin reported for device 25 functions.
0h = PIRQA# (Default)
1h = PIRQB#
2h = PIRQC#
3h = PIRQD#
4h = PIRQE#
5h = PIRQF#
6h = PIRQG#
7h = PIRQH#
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