Datasheet 43
Introduction
Chapter 11, “PCI-to-PCI Bridge Registers (D30:F0)”
Chapter 11 provides a detailed description of registers that reside in the PCI-to-PCI
bridge. This bridge resides at Device 30, Function 0 (D30:F0).
Chapter 12, “Gigabit LAN Configuration Registers”
Chapter 12 provides a detailed description of registers that reside in the PCH’s
integrated LAN controller. The integrated LAN Controller resides at Device 25,
Function 0 (D25:F0).
Chapter 13, “LPC Interface Bridge Registers (D31:F0)”
Chapter 13 provides a detailed description of registers that reside in the LPC bridge.
This bridge resides at Device 31, Function 0 (D31:F0). This function contains registers
for many different units within the PCH including DMA, Timers, Interrupts, Processor
Interface, GPIO, Power Management, System Management and RTC.
Chapter 14, “SATA Controller Registers (D31:F2)”
Chapter 14 provides a detailed description of registers that reside in the SATA
controller #1. This controller resides at Device 31, Function 2 (D31:F2).
Chapter 15, “SATA Controller Registers (D31:F5)”
Chapter 15 provides a detailed description of registers that reside in the SATA
controller #2. This controller resides at Device 31, Function 5 (D31:F5).
Chapter 16, “EHCI Controller Registers (D29:F0, D26:F0)”
Chapter 16 provides a detailed description of registers that reside in the two EHCI host
controllers. These controllers reside at Device 29, Function 0 (D29:F0) and Device 26,
Function 0 (D26:F0).
Chapter 17, “Integrated Intel® High Definition Audio Controller Registers”
Chapter 17 provides a detailed description of registers that reside in the Intel High
Definition Audio controller. This controller resides at Device 27, Function 0 (D27:F0).
Chapter 18, “SMBus Controller Registers (D31:F3)”
Chapter 18 provides a detailed description of registers that reside in the SMBus
controller. This controller resides at Device 31, Function 3 (D31:F3).
Chapter 19, “PCI Express* Configuration Registers”
Chapter 19 provides a detailed description of registers that reside in the PCI Express
controller. This controller resides at Device 28, Functions 0 to 7 (D28:F0-F7).
Chapter 20, “High Precision Event Timer Registers”
Chapter 20 provides a detailed description of registers that reside in the multimedia
timer memory mapped register space.
Chapter 21, “Serial Peripheral Interface (SPI)”
Chapter 21 provides a detailed description of registers that reside in the SPI memory
mapped register space.
Chapter 22, “Thermal Sensor Registers (D31:F6)”
Chapter 22 provides a detailed description of registers that reside in the thermal
sensors PCI configuration space. The registers reside at Device 31, Function 6
(D31:F6).
Chapter 23, “Intel® Management Engine Interface (MEI) Subsystem Registers
(D22:F0)”
Chapter 23 provides a detailed description of registers that reside in the Intel ME
controller. The registers reside at Device 22, Function 0 (D22:F0).
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