Datasheet 533
LPC Interface Bridge Registers (D31:F0)
13.8.3.12 DEVACT_STS — Device Activity Status Register
I/O Address: PMBASE +44h Attribute: R/WC
Default Value: 0000h Size: 16-bit
Lockable: No Usage: Legacy Only
Power Well: Core
Each bit indicates if an access has occurred to the corresponding device’s trap range, or
for bits 6:9 if the corresponding PCI interrupt is active. This register is used in
conjunction with the Periodic SMI# timer to detect any system activity for legacy power
management. The periodic SMI# timer indicates if it is the right time to read the
DEVACT_STS register (PMBASE + 44h).
Note: Software clears bits that are set in this register by writing a 1 to the bit position.
13.8.3.13 PM2_CNT—Power Management 2 Control
I/O Address: PMBASE + 50h
Attribute: R/W
Default Value: 00h Size: 8-bit
Lockable: No Usage: ACPI
Power Well: Core
Bit Description
15:13 Reserved
12
KBC_ACT_STS — R/WC. KBC (60/64h).
0 = Indicates that there has been no access to this device I/O range.
1 = This device I/O range has been accessed. Clear this bit by writing a 1 to the bit
location.
11:10 Reserved
9
PIRQDH_ACT_STS — R/WC. PIRQ[D or H].
0 = The corresponding PCI interrupts have not been active.
1 = At least one of the corresponding PCI interrupts has been active. Clear this bit by
writing a 1 to the bit location.
8
PIRQCG_ACT_STS — R/WC. PIRQ[C or G].
0 = The corresponding PCI interrupts have not been active.
1 = At least one of the corresponding PCI interrupts has been active. Clear this bit by
writing a 1 to the bit location.
7
PIRQBF_ACT_STS — R/WC. PIRQ[B or F].
0 = The corresponding PCI interrupts have not been active.
1 = At least one of the corresponding PCI interrupts has been active. Clear this bit by
writing a 1 to the bit location.
6
PIRQAE_ACT_STS — R/WC. PIRQ[A or E].
0 = The corresponding PCI interrupts have not been active.
1 = At least one of the corresponding PCI interrupts has been active. Clear this bit by
writing a 1 to the bit location.
5:0 Reserved
Bit Description
7:1
Reserved
0
Arbiter Disable (ARB_DIS) — R/W This bit is a scratchpad bit for legacy software
compatibility.
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