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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 632

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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SATA Controller Registers (D31:F5)
632 Datasheet
15.1.32 ATC—APM Trapping Control Register (SATA–D31:F5)
Address Offset: C0h Attribute: R/W
Default Value: 00h Size: 8 bits
Note: This SATA controller does not support legacy I/O access. Therefore, this register is
reserved. Software shall not change the default values of the register; otherwise, the
result will be undefined.
.
15.1.33 ATC—APM Trapping Control (SATA–D31:F5)
Address Offset: C4h Attribute: R/WC
Default Value: 00h Size: 8 bits
Note: This SATA controller does not support legacy I/O access. Therefore, this register is
reserved. Software shall not change the default values of the register; otherwise the
result will be undefined.
.
Bit Description
7:0 Reserved
Bit Description
7:0 Reserved

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