EHCI Controller Registers (D29:F0, D26:F0)
662 Datasheet
16.2.1.1 CAPLENGTH—Capability Registers Length Register
Offset: MEM_BASE + 00h Attribute: RO
Default Value: 20h Size: 8 bits
16.2.1.2 HCIVERSION—Host Controller Interface Version Number
Register
Offset: MEM_BASE + 02h–03h Attribute: RO
Default Value: 0100h Size: 16 bits
16.2.1.3 HCSPARAMS—Host Controller Structural Parameters
Offset: MEM_BASE + 04h–07h Attribute: R/W, RO
Default Value: 00204208h (D29:F0) Size: 32 bits
00203206h (D26:F0)
Function Level Reset: No
Note: This register is reset by a suspend well reset and not a D3-to-D0 reset or HCRESET.
NOTE: This register is writable when the WRT_RDONLY bit is set.
Bit Description
7:0
Capability Register Length Value — RO. This register is used as an offset to add to
the Memory Base Register (D29:F0, D26:F0:10h) to find the beginning of the
Operational Register Space. This field is hardwired to 20h indicating that the Operation
Registers begin at offset 20h.
Bit Description
15:0
Host Controller Interface Version Number — RO. This is a two-byte register
containing a BCD encoding of the version number of interface that this host controller
interface conforms.
Bit Description
31:24 Reserved.
23:20
Debug Port Number (DP_N) — RO. Hardwired to 2h indicating that the Debug Port is
on the second lowest numbered port on the EHCI.
EHCI#1: Port 1
EHCI#2: Port 9
19:16 Reserved
15:12
Number of Companion Controllers (N_CC) — R/W. This field indicates the number of
companion controllers associated with this USB EHCI host controller.
BIOS must program this field to 0b to indicate companion host controllers are not
supported. Port-ownership hand-off is not supported. Only high-speed devices are
supported on the host controller root ports.
11:8
Number of Ports per Companion Controller (N_PCC) — RO. This field indicates the
number of ports supported per companion host controller. This field is 0h indication no
other companion controller support.
7:4 Reserved. These bits are reserved and default to 0.
3:0
N_PORTS — R/W. This field specifies the number of physical downstream ports
implemented on this host controller. The value of this field determines how many port
registers are addressable in the Operational Register Space. Valid values are in the
range of 1h to Fh. A 0 in this field is undefined.
For Integrated USB 2.0 Rate Matching Hub Enabled: Each EHCI reports 2 ports by
default. Port 0 assigned to the RMH and port 1 assigned as the debug port. When the
KVM/USB-R feature is enabled it will show up as Port2 on the EHCI, and BIOS would
need to update this field to 3h.
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