Integrated Intel
®
High Definition Audio Controller Registers
714 Datasheet
17.1.2.9 GSTS—Global Status Register
(Intel
®
High Definition Audio Controller—D27:F0)
Memory Address:HDBAR + 10h Attribute: R/WC
Default Value: 0000h Size: 16 bits
17.1.2.10 OUTSTRMPAY—Output Stream Payload Capability
(Intel
®
High Definition Audio Controller—D27:F0)
Memory Address:HDBAR + 18h Attribute: RO
Default Value: 0030h Size: 16 bits
17.1.2.11 INSTRMPAY—Input Stream Payload Capability
(Intel
®
High Definition Audio Controller—D27:F0)
Memory Address:HDBAR + 1Ah Attribute: RO
Default Value: 0018h Size: 16 bits
Bit Description
15:2 Reserved.
1
Flush Status — R/WC. This bit is set to 1 by hardware to indicate that the flush cycle
initiated when the Flush Control bit (HDBAR + 08h, bit 1) was set has completed.
Software must write a 1 to clear this bit before the next time the Flush Control bit is
set to clear the bit.
0 Reserved.
Bit Description
15:8 Reserved
7:0
Output Stream Payload Capability (OUTSTRMPAY)— RO: Indicates maximum
number of words per frame for any single output stream. This measurement is in 16 bit
word quantities per 48 kHz frame. 48 Words (96B) is the maximum supported,
therefore a value of 30h is reported in this register. Software must ensure that a format
which would cause more words per frame than indicated is not programmed into the
Output Stream Descriptor register.
00h = 0 words
01h = 1 word payload
…
FFh = 255h word payload
Bit Description
15:8 Reserved
7:0
Input Stream Payload Capability (INSTRMPAY)— RO. Indicates maximum number
of words per frame for any single input stream. This measurement is in 16 bit word
quantities per 48 kHz frame. 24 Words (48B) is the maximum supported, therefore a
value of 18h is reported in this register. Software must ensure that a format which
would cause more words per frame than indicated is not programmed into the Input
Stream Descriptor register.
00h = 0 words
01h = 1 word payload
…
FFh = 255h word payload
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