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Intel 6 SERIES CHIPSET - DATASHEET 01-2011

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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Signal Description
82 Datasheet
GPIO30 I/O 3.3 V Suspend Native Yes
Multiplexed with SUSPWRDNACK,
SUSWARN#
Desktop: Can be configured as
SUSWARN# or GPIO30 only.
Cannot be used as
SUSPWRDNACK.
Mobile: Used as SUSPWRDNACK,
SUSWARN#, or GPIO30
GPIO29 I/O 3.3 V Suspend GPI No
Multiplexed with SLP_LAN#
Pin usage as GPIO is determined
by SLP_LAN#/GPIO Select Soft-
strap. When soft-strap = 1, pin
can be used as GPIO and defaults
to GP Input (Note 10)
GPIO28 I/O 3.3 V Suspend GPO Yes Unmultiplexed
GPIO27 I/O 3.3 V DSW GPI Yes
Unmultiplexed. Can be configured
as wake input to allow wakes
from Deep S4/S5.
GPIO26
(Mobile Only)
I/O 3.3 V Suspend Native Yes
Mobile: Multiplexed with
PCIECLKRQ4#
GPIO25
(Mobile Only)
I/O 3.3 V Suspend Native Yes
Mobile: Multiplexed with
PCIECLKRQ3#
GPIO24 I/O 3.3 V Suspend GPO Yes
Desktop: Can be used as
PROC_MISSING configured using
Intel ME firmware.
Mobile: Unmultiplexed
NOTE: GPIO24 configuration
register bits are not
cleared by CF9h reset
event.
GPIO23 I/O 3.3 V Core Native Yes Multiplexed with LDRQ1#.
GPIO22 I/O 3.3 V Core GPI Yes Multiplexed with SCLOCK
GPIO21 I/O 3.3 V Core GPI Yes Multiplexed with SATA0GP
GPIO20 I/O 3.3 V Core Native Yes Multiplexed with PCIECLKRQ2#
GPIO19 I/O 3.3 V Core GPI Yes Multiplexed with SATA1GP
GPIO18
(Mobile Only)
I/O 3.3 V Core Native
Yes
(Note 7)
Mobile: Multiplexed with
PCIECLKRQ1#
GPIO17 I/O 3.3 V Core GPI Yes Mobile: Used as GPIO17 only.
GPIO16 I/O 3.3 V Core GPI Yes Multiplexed with SATA4GP
GPIO15 I/O 3.3 V Suspend GPO Yes Unmultiplexed
GPIO14 I/O 3.3 V Suspend Native Yes Multiplexed with OC7#
GPIO13 I/O 3.3 V Suspend GPI Yes
Multiplexed with
HDA_DOCK_RST# (Mobile Only)
(Note 4)
Desktop: Used as GPIO only
Table 2-24. General Purpose I/O Signals (Sheet 3 of 4)
Name Type Tolerance
Power
Well
Default
Blink
Capability
Description

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