Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 893

Datasheet 893
Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.4.4 ME CSR_HA—ME Control Status Host Access
(MEI MMIO Register)
Address Offset: MEI1_MBAR + 0Ch Attribute: RO
Default Value: 02000000h Size: 32 bits
Bit Description
31:24
ME Circular Buffer Depth Host Read Access (ME_CBD_HRA).
Host read only access to ME_CBD.
23:16
ME CB Write Pointer Host Read Access (ME_CBWP_HRA).
Host read only access to ME_CBWP.
15:8
ME CB Read Pointer Host Read Access (ME_CBRP_HRA).
Host read only access to ME_CBRP.
7:5 Reserved
4
ME Reset Host Read Access (ME_RST_HRA).
Host read access to ME_RST.
3
ME Ready Host Read Access (ME_RDY_HRA).
Host read access to ME_RDY.
2
ME Interrupt Generate Host Read Access (ME_IG_HRA).
Host read only access to ME_IG.
1
ME Interrupt Status Host Read Access (ME_IS_HRA).
Host read only access to ME_IS.
0
ME Interrupt Enable Host Read Access (ME_IE_HRA).
Host read only access to ME_IE.