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Intel 6 SERIES CHIPSET - DATASHEET 01-2011 - Page 912

Intel 6 SERIES CHIPSET - DATASHEET 01-2011
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Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
912 Datasheet
23.6.19 IDDHOR0—IDE Drive Head Out Register Device 0
Register (IDER—D22:F2)
Address Offset: 06h Attribute: R/W
Default Value: 00h Size: 8 bits
This register is read only by the Host. Host read to this Drive/head In register address
reads the IDE Drive/Head Out Register (IDEDHOR0) if DEV=0.
Bit 4 of this register is the DEV (master/slave) bit. This bit is cleared by hardware on
IDE software reset (S_RST toggles to 1) in addition to the Host system reset and D3 to
D0 transition of the IDE function.
When the host writes to this address, it updates the value of the IDEDHIR register.
23.6.20 IDESD0R—IDE Status Device 0 Register
(IDER—D22:F2)
Address Offset: 07h Attribute: R/W
Default Value: 80h Size: 8 bits
This register implements the status register of the Master device (DEV = 0). This
register is read only by the Host. Host read of this register clears the Master device's
interrupt.
When the HOST writes to the same address it writes to the command register
The bits description is for ATA mode.
Bit Description
7:0
IDE Drive Head Out DEV 0 (IDEDHO0) — R/W. Drive/Head Out register of Master
device.
Bit Description
7
Busy (BSY) — R/W. This bit is set by HW when the IDECR is being written and
DEV=0, or when SRST bit is asserted by Host or host system reset or D3-to-D0
transition of the IDE function.
This bit is cleared by FW write of 0.
6
Drive Ready (DRDY) — R/W. When set, this bit indicates drive is ready for
command.
5 Drive Fault (DF)— R/W. Indicates Error on the drive.
4
Drive Seek Complete (DSC)— R/W. Indicates Heads are positioned over the
desired cylinder.
3
Data Request (DRQ)— R/W. Set when, the drive wants to exchange data with the
Host using the data register.
2
Corrected Data (CORR)— R/W. When set, this bit indicates a correctable read error
has occurred.
1
Index (IDX)— R/W. This bit is set once per rotation of the medium when the index
mark passes under the read/write head.
0
Error (ERR)— R/W. When set, this bit indicates an error occurred in the process of
executing the previous command. The Error Register of the selected device contains
the error information.

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