Datasheet 929
Intel® Management Engine Interface (MEI) Subsystem Registers (D22:F0)
23.9.20 MD—Message Signaled Interrupt Message Data
Register (KT—D22:F3)
Address Offset: DC–DDh Attribute: R/W
Default Value: 0000h Size: 16 bits
This 16-bit field is programmed by system software if MSI is enabled
23.10 KT IO/ Memory Mapped Device Registers
Bit Description
15:0
Data (DATA)— R/W. This MSI data is driven onto the lower word of the data bus of
the MSI memory write transaction.
Table 23-8. KT IO/ Memory Mapped Device Register Address Map
Address
Offset
Register
Symbol
Register Name
Default
Value
Attribute
0h KTRxBR KT Receive Buffer Register 00h RO
0h KTTHR KT Transmit Holding Register 00h WO
0h KTDLLR KT Divisor Latch LSB Register 00h R/W
1h KTIER KT Interrupt Enable register 00h
R/W
RO
1h KTDLMR KT Divisor Latch MSB Register 00h R/W
2h KTIIR KT Interrupt Identification register 01h RO
2h KTFCR KT FIFO Control register 00h WO
3h KTLCR KT Line Control register 03h R/W
4h KTMCR KT Modem Control register 00h RO, R/W
5h KTLSR KT Line Status register 00h RO
6h KTMSR KT Modem Status register 00h RO
7h KTSCR KT Scratch register 00h R/W
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