Panasonic FP7 Series - BCDMUL (BCD Data Multiplication)

6.12 BCDMUL (BCD Data Multiplication)
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Ladder diagram
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Available operation units (●: Available)
Operatio
n unit
bit US SS UL SL SF DF
i ● ●
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List of operands
Operand Description
S1 Calculation target data 1 (device address or constant) (Available data: H0 to H9 for each digit)
S2 Calculation target data 2 (device address or constant) (Available data: H0 to H9 for each digit)
D Calculation result data (device address)
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Available devices (●: Available)
Operan
d
16-Bit device:
32-Bit
device:
(Note 1)
Integer
Real
numbe
r
St
rin
g
Index
modifie
r
(Note 2)
W
X
W
Y
W
R
W
L
W
S
S
D
D
T
L
D
U
M
WI
W
O
TS
C
S
TE
C
E
IX
(N
ote
3)
K Ｕ H SF
D
F
" "
S1 ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ●
S2 ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ●
D ● ● ● ● ● ● ● ● ● ● ● ●
(Note 1) Cannot be specified when the operation unit is 16-bit integer (SS, US).
(Note 2) Only 16-bit devices, and 32-bit devices can be modified. (Integer constants, real number constants,
and character constants cannot be specified.)
(Note 3) Index register (I0 to IE)
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Outline of operation
● This instruction multiplies the BCD data for [S1] and [S2] by the operation unit [i].
● The calculation result is stored in the address starting with [D].
[S1] × [S2] → ([D], [D]+1)
● The unit size of the operation result output in [D] is twice as large as the operation unit.
6.12 BCDMUL (BCD Data Multiplication)
6-26 WUME-FP7CPUPGR-12